CUS-0002,L1,,
CCAP,4,B16B17,B27A,B16B17_SS,B27A_SS,
DRAM,38,030h,
1,DDR3 Controller Side Driver Strength (0: Auto Training),Bh,Bh,Bh,Ch,Ch,hex,000h,0,4,text,1,(null),
1,DDR3 Controller Side ODT(0: Auto Training),1h,1h,1h,7h,7h,hex,000h,4,4,text,1,(null),
1,DDR3 Controller Side Driver Strength ZQ1,Bh,Bh,Bh,Bh,Bh,hex,05Ch,0,4,text,1,(null),
1,DDR3 Controller Side ODT ZQ1,1h,1h,1h,1h,1h,hex,05Ch,4,4,text,1,(null),
1,DDR3 DRAM Side Driving Strength,9,9,9,9,9,dec,001h,0,4,drop,8,0/Auto,8/DDR3-RZQ/6,9/DDR3-RZQ/7 / LPDDR2-34.3(ohms),10/LPDDR2-40(ohms),11/LPDDR2-48(ohms),12/LPDDR2-60(ohms),14/LPDDR2-80(ohms),15/LPDDR2-120(ohms),
1,DDR3 DRAM Side ODT,10,10,10,11,11,dec,001h,4,4,drop,7,0/Auto,8/ODT Disabled,10/DDR3-RZQ/2,9/DDR3-RZQ/4,11/DDR3-RZQ/6,13/DDR3-RZQ/8,12/DDR3-RZQ/12,
1,DDR3 REF NUM (Number of refresh command to DRAM/ default=0x04),4h,4h,4h,4h,4h,hex,055h,0,8,text,1,(null),
1,DDR3 REF INVL (DRAM auto refresh rate/ unit: 40ns (25MHz)/ spec=7.8us/ default=0x80 (~=4.096us)),80h,80h,80h,80h,80h,hex,056h,0,8,text,1,(null),
1,DDR3 DxODT Enable,0h,0h,0h,0h,0h,hex,05Bh,1,1,check,2,0h/Disable,1h/Enable,
1,LPDDR3 Controller Side Driver Strength(0: Auto Training),Bh,Bh,Bh,Bh,Bh,hex,053h,0,4,text,1,(null),
1,LPDDR3 Controller Side ODT(0: Auto Training),7h,7h,7h,7h,7h,hex,053h,4,4,text,1,(null),
1,LPDDR3 Controller Side Driver Strength ZQ1,Bh,Bh,Bh,Bh,Bh,hex,05Dh,0,4,text,1,(null),
1,LPDDR3 Controller Side ODT ZQ1,7h,7h,7h,7h,7h,hex,05Dh,4,4,text,1,(null),
1,LPDDR3 DRAM Side Driving Strength,11h,11h,11h,11h,11h,hex,050h,0,5,drop,9,0h/Auto,11h/34.3ohms typical,12h/40ohms typical,13h/48ohms typical,14h/60ohms typical,16h/80ohms typical,19h/34.3ohms pull-down 40ohms pull-up (240ohms termination),1Ah/40ohms pull-down 48ohms pull-up (240ohms termination),1Bh/34.3ohms pull-down 48ohms pull-up (120ohms termination),
1,LPDDR3 DRAM Side ODT,7,7,7,7,7,dec,050h,5,3,drop,4,0/Auto,4/Disable,6/RZQ/2,7/RZQ/1,
1,LPDDR3 REF NUM (Number of refresh command to DRAM /default=0x08),8h,8h,8h,8h,8h,hex,057h,0,8,text,1,(null),
1,LPDDR3 REF INVL (DRAM auto refresh rate/ unit: 40ns (25MHz)/ spec=3.9us/ default=0x58 (~=3.128us)),58h,58h,58h,58h,58h,hex,058h,0,8,text,1,(null),
1,LPDDR3 DxODT Enable,0h,0h,0h,0h,0h,hex,05Bh,2,1,check,2,0h/Disable,1h/Enable,
1,DDR4 Controller Side Driver Strength(0: Auto Training),Dh,Dh,Dh,Dh,Dh,hex,054h,0,4,text,1,(null),
1,DDR4 Controller Side ODT(0: Auto Training),1h,1h,1h,1h,1h,hex,054h,4,4,text,1,(null),
1,DDR4 Controller Side Driver Strength ZQ1,Dh,Dh,Dh,Dh,Dh,hex,05Eh,0,4,text,1,(null),
1,DDR4 Controller Side ODT ZQ1,1h,1h,1h,1h,1h,hex,05Eh,4,4,text,1,(null),
1,DDR4 DRAM Side Driving Strength,9,9,9,9,9,dec,051h,0,4,drop,3,0/Auto,8/RZQ/7 (34ohms),9/RZQ/5 (48ohms),
1,DDR4 DRAM Side ODT (RTT_NOM),10,10,10,10,10,dec,051h,4,4,drop,9,0/Auto,8/Disabled,9/RZQ/4 (60ohms),10/RZQ/2 (120ohms),11/RZQ/6 (40ohms),12/RZQ/1 (240ohms),13/RZQ/5 (48ohms),14/RZQ/3 (80ohms),15/RZQ/7 (34ohms),
1,DDR4 DRAM Side Dynamic ODT (RTT_WR),0,0,0,0,0,dec,052h,0,4,drop,6,0/Auto,8/Disabled (WRITE does not affect RTT value),9/RZQ/2 (120ohms),10/RZQ/1 (240ohms),11/Hi-Z,12/RZQ/3 (80ohms),
1,DDR4 REF NUM (Number of refresh command to DRAM /default=0x04),4h,4h,4h,4h,4h,hex,059h,0,8,text,1,(null),
1,DDR4 REF INVL (DRAM auto refresh rate/ unit: 40ns (25MHz)/ spec=7.8us/ default=0x80 (~=4.096us)),80h,80h,80h,80h,80h,hex,05Ah,0,8,text,1,(null),
1,DDR4 DxODT Enable,0h,0h,0h,0h,0h,hex,05Bh,0,1,check,2,0h/Disable,1h/Enable,
1,DRAM0 IO TX DLL Offset ,0h,0h,0h,0h,0h,hex,002h,0,8,drop,8,0h/0-Minimum Delay,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7-Maximum Delay,
1,DRAM1 IO TX DLL Offset ,0h,0h,0h,0h,0h,hex,003h,0,8,drop,8,0h/0-Minimum Delay,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7-Maximum Delay,
1,DRAM2 IO TX DLL Offset ,0h,0h,0h,0h,0h,hex,004h,0,8,drop,8,0h/0-Minimum Delay,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7-Maximum Delay,
1,DRAM3 IO TX DLL Offset ,0h,0h,0h,0h,0h,hex,005h,0,8,drop,8,0h/0-Minimum Delay,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7-Maximum Delay,
1,DRAM Bank Address Interleave,1h,1h,1h,1h,1h,hex,006h,1,1,check,2,0h/Disable,1h/Enable,
1,DRAM Bank Address Interleave Size,1h,1h,1h,1h,1h,hex,006h,2,2,drop,4,0h/1MB,1h/2MB,2h/4MB,3h/8MB,
1,Dump DRAM read/write training window for SE debug,0h,0h,0h,0h,0h,hex,05Bh,3,1,check,2,0h/Disable,1h/Enable,
1,VDT18(DDR3) setting,8h,8h,8h,8h,8h,hex,05Fh,0,8,drop,17,0h/Disable,1h/VRR=0.90/VFR=0.85 ,2h/VRR=0.95/VFR=0.90 ,3h/VRR=1.00/VFR=0.95 ,4h/VRR=1.05/VFR=1.00 ,5h/VRR=1.10/VFR=1.05 ,6h/VRR=1.15/VFR=1.10 ,7h/VRR=1.20/VFR=1.15 ,8h/VRR=1.25/VFR=1.20 ,9h/VRR=1.30/VFR=1.25 ,Ah/VRR=1.35/VFR=1.30 ,Bh/VRR=1.40/VFR=1.35 ,Ch/VRR=1.45/VFR=1.40 ,Dh/VRR=1.50/VFR=1.45 ,Eh/VRR=1.65/VFR=1.60 ,Fh/VRR=1.70/VFR=1.65 ,10h/VRR=1.75/VFR=1.70 ,
1,VDT18(LPDDR3) setting,5h,5h,5h,5h,5h,hex,060h,0,8,drop,17,0h/Disable,1h/VRR=0.90/VFR=0.85 ,2h/VRR=0.95/VFR=0.90 ,3h/VRR=1.00/VFR=0.95 ,4h/VRR=1.05/VFR=1.00 ,5h/VRR=1.10/VFR=1.05 ,6h/VRR=1.15/VFR=1.10 ,7h/VRR=1.20/VFR=1.15 ,8h/VRR=1.25/VFR=1.20 ,9h/VRR=1.30/VFR=1.25 ,Ah/VRR=1.35/VFR=1.30 ,Bh/VRR=1.40/VFR=1.35 ,Ch/VRR=1.45/VFR=1.40 ,Dh/VRR=1.50/VFR=1.45 ,Eh/VRR=1.65/VFR=1.60 ,Fh/VRR=1.70/VFR=1.65 ,10h/VRR=1.75/VFR=1.70 ,
1,VDT18(DDR4) setting,5h,5h,5h,5h,5h,hex,061h,0,8,drop,17,0h/Disable,1h/VRR=0.90/VFR=0.85 ,2h/VRR=0.95/VFR=0.90 ,3h/VRR=1.00/VFR=0.95 ,4h/VRR=1.05/VFR=1.00 ,5h/VRR=1.10/VFR=1.05 ,6h/VRR=1.15/VFR=1.10 ,7h/VRR=1.20/VFR=1.15 ,8h/VRR=1.25/VFR=1.20 ,9h/VRR=1.30/VFR=1.25 ,Ah/VRR=1.35/VFR=1.30 ,Bh/VRR=1.40/VFR=1.35 ,Ch/VRR=1.45/VFR=1.40 ,Dh/VRR=1.50/VFR=1.45 ,Eh/VRR=1.65/VFR=1.60 ,Fh/VRR=1.70/VFR=1.65 ,10h/VRR=1.75/VFR=1.70 ,
DRAM Test,17,100h,
1,Test Loop,0,0,0,0,0,dec,000h,0,8,text,1,(null),
1,Test pattern,0h,0h,0h,0h,0h,hex,001h,0,3,drop,5,0h/0-Sequentially,1h/1-Fixed,2h/2-Randomly,3h/3-Simulate full pack write,4h/4-Fill a known specific pattern,
1,Test mode (CPU read write),1h,1h,1h,1h,1h,hex,002h,0,1,check,2,0h/Disable,1h/Enable,
1,Test mode (DMA read write),1h,1h,1h,1h,1h,hex,002h,1,1,check,2,0h/Disable,1h/Enable,
1,Test mode (Read ASIC temperature),0h,0h,0h,0h,0h,hex,002h,2,1,check,2,0h/Disable,1h/Enable,
1,Test mode (Enter self-refresh),0h,0h,0h,0h,0h,hex,002h,3,1,check,2,0h/Disable,1h/Enable,
1,Test mode (Scan weak cell/ gradually increase step of refresh interval),0h,0h,0h,0h,0h,hex,002h,4,1,check,2,0h/Disable,1h/Enable,
1,REF INVL of Weak Cell Scan (if scan weak cell enable),0,0,0,0,0,dec,003h,0,2,drop,4,0/0x14/ tREFI=0.8 uS (Assume REF NUM=0),1/0x28/ tREFI=1.6 uS (Assume REF NUM=0),2/0x50/ tREFI=3.2 uS (Assume REF NUM=0),3/0x78/ tREFI=4.8 uS (Assume REF NUM=0),
1,Start REF Step,0,0,0,0,0,dec,003h,2,2,drop,4,0/REF INVL x1,1/REF INVL x2,2/REF INVL x3,3/REF INVL x4,
1,Stop REF Step,0,0,0,0,0,dec,003h,4,4,drop,16,0/REF INVL x1,1/REF INVL x2,2/REF INVL x3,3/REF INVL x4,4/REF INVL x5,5/REF INVL x6,6/REF INVL x7,7/REF INVL x8,8/REF INVL x9,9/REF INVL x10,10/REF INVL x11,11/REF INVL x12,12/REF INVL x13,13/REF INVL x14,14/REF INVL x15,15/Infinite loop until we found a fail address (debug use).,
1,Loop count per each tREFI (at least set 1),3,3,3,3,3,dec,001h,3,5,text,1,(null),
1,Known specific pattern/ byte lane 0 (if Test pattern=4h),0h,0h,0h,0h,0h,hex,004h,0,8,text,1,(null),
1,Known specific pattern/ byte lane 1,0h,0h,0h,0h,0h,hex,005h,0,8,text,1,(null),
1,Known specific pattern/ byte lane 2,0h,0h,0h,0h,0h,hex,006h,0,8,text,1,(null),
1,Known specific pattern/ byte lane 3,0h,0h,0h,0h,0h,hex,007h,0,8,text,1,(null),
1,Test mode (Test Pattern Bit Mask),0,0,0,0,0,dec,008h,0,2,drop,3,0/Disable,1/OR (Set the bit postion to be '1'),2/AND (Clear the bit postion to be '0'),
1,Which bit position to be masked (bit 0 to bit 31),0,0,0,0,0,dec,008h,2,5,text,1,(null),
FLASH DLL ADJ,17,037h,
1,Error bit TH for DLL ADJ training fail(Default=0 and FFh means ECCFail),04h,04h,04h,04h,04h,hex,000h,0,8,text,1,default 0 bits,
1,Flash Ch0 RX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,001h,0,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch0 TX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,001h,4,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch1 RX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,002h,0,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch1 TX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,002h,4,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch2 RX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,003h,0,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch2 TX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,003h,4,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch3 RX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,004h,0,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch3 TX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,004h,4,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch4 RX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,005h,0,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch4 TX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,005h,4,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch5 RX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,006h,0,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch5 TX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,006h,4,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch6 RX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,007h,0,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch6 TX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,007h,4,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch7 RX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,008h,0,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
1,Flash Ch7 TX DLL ADJ Offset Value,0h,0h,0h,0h,0h,hex,008h,4,4,drop,15,Fh/-7,Eh/-6,Dh/-5,Ch/-4,Bh/-3,Ah/-2,9h/-1,0h/0,1h/1,2h/2,3h/3,4h/4,5h/5,6h/6,7h/7,
FLASH Driving Sterngth(ASIC),72,040h,
1,CH0 Flash Driving Sterngth Enable/Disable,1h,1h,1h,1h,1h,hex,000h,0,1,check,2,0h/Disable,1h/Enable,
1,# Flash CH0 WE/RE Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,001h,4,4,text,1,# Flash CH0 WE/RE Pull Down Driving Strength,
1,# Flash CH0 WE/RE Pull Up Driving Strength Up,7h,7h,7h,7h,7h,hex,001h,0,4,text,1,# Flash CH0 WE/RE Pull Up Driving Strength Up,
1,# Flash CH0 CLE/AES Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,002h,4,4,text,1,# Flash CH0 CLE/AES Pull Down Driving Strength,
1,# Flash CH0 CLE/AES Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,002h,0,4,text,1,# Flash CH0 CLE/AES Pull Up Driving Strength,
1,# Flash CH0 DQ Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,003h,4,4,text,1,# Flash CH0 DQ Pull Down Driving Strength,
1,# Flash CH0 DQ Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,003h,0,4,text,1,# Flash CH0 DQ Pull Up Driving Strength,
1,# Flash CH0 DQS Dpull Downriving Strength,7h,7h,7h,7h,7h,hex,004h,4,4,text,1,# Flash CH0 DQS Dpull Downriving Strength,
1,# Flash Ch0 DQS Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,004h,0,4,text,1,# Flash Ch0 DQS Pull Up Driving Strength,
1,CH1 Flash Driving Sterngth Enable/Disable,1h,1h,1h,1h,1h,hex,000h,1,1,check,2,0h/Disable,1h/Enable,
1,# Flash CH1 WE/RE Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,005h,4,4,text,1,# Flash CH1 WE/RE Pull Down Driving Strength,
1,# Flash CH1 WE/RE Pull Up Driving Strength Up,7h,7h,7h,7h,7h,hex,005h,0,4,text,1,# Flash CH1 WE/RE Pull Up Driving Strength Up,
1,# Flash CH1 CLE/AES Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,006h,4,4,text,1,# Flash CH1 CLE/AES Pull Down Driving Strength,
1,# Flash CH1 CLE/AES Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,006h,0,4,text,1,# Flash CH1 CLE/AES Pull Up Driving Strength,
1,# Flash CH1 DQ Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,007h,4,4,text,1,# Flash CH1 DQ Pull Down Driving Strength,
1,# Flash CH1 DQ Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,007h,0,4,text,1,# Flash CH1 DQ Pull Up Driving Strength,
1,# Flash CH1 DQS Dpull Downriving Strength,7h,7h,7h,7h,7h,hex,008h,4,4,text,1,# Flash CH1 DQS Dpull Downriving Strength,
1,# Flash CH1 DQS Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,008h,0,4,text,1,# Flash CH1 DQS Pull Up Driving Strength,
1,CH2 Flash Driving Sterngth Enable/Disable,1h,1h,1h,1h,1h,hex,000h,2,1,check,2,0h/Disable,1h/Enable,
1,# Flash CH2 WE/RE Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,009h,4,4,text,1,# Flash CH2 WE/RE Pull Down Driving Strength,
1,# Flash CH2 WE/RE Pull Up Driving Strength Up,7h,7h,7h,7h,7h,hex,009h,0,4,text,1,# Flash CH2 WE/RE Pull Up Driving Strength Up,
1,# Flash CH2 CLE/AES Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,00Ah,4,4,text,1,# Flash CH2 CLE/AES Pull Down Driving Strength,
1,# Flash CH2 CLE/AES Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,00Ah,0,4,text,1,# Flash CH2 CLE/AES Pull Up Driving Strength,
1,# Flash CH2 DQ Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,00Bh,4,4,text,1,# Flash CH2 DQ Pull Down Driving Strength,
1,# Flash CH2 DQ Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,00Bh,0,4,text,1,# Flash CH2 DQ Pull Up Driving Strength,
1,# Flash CH2 DQS Dpull Downriving Strength,7h,7h,7h,7h,7h,hex,00Ch,4,4,text,1,# Flash CH2 DQS Dpull Downriving Strength,
1,# Flash CH2 DQS Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,00Ch,0,4,text,1,# Flash CH2 DQS Pull Up Driving Strength,
1,CH3 Flash Driving Sterngth Enable/Disable,1h,1h,1h,1h,1h,hex,000h,3,1,check,2,0h/Disable,1h/Enable,
1,# Flash CH3 WE/RE Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,00Dh,4,4,text,1,# Flash CH3 WE/RE Pull Down Driving Strength,
1,# Flash CH3 WE/RE Pull Up Driving Strength Up,7h,7h,7h,7h,7h,hex,00Dh,0,4,text,1,# Flash CH3 WE/RE Pull Up Driving Strength Up,
1,# Flash CH3 CLE/AES Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,00Eh,4,4,text,1,# Flash CH3 CLE/AES Pull Down Driving Strength,
1,# Flash CH3 CLE/AES Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,00Eh,0,4,text,1,# Flash CH3 CLE/AES Pull Up Driving Strength,
1,# Flash CH3 DQ Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,00Fh,4,4,text,1,# Flash CH3 DQ Pull Down Driving Strength,
1,# Flash CH3 DQ Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,00Fh,0,4,text,1,# Flash CH3 DQ Pull Up Driving Strength,
1,# Flash CH3 DQS Dpull Downriving Strength,7h,7h,7h,7h,7h,hex,010h,4,4,text,1,# Flash CH3 DQS Dpull Downriving Strength,
1,# Flash CH3 DQS Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,010h,0,4,text,1,# Flash CH3 DQS Pull Up Driving Strength,
1,CH4 Flash Driving Sterngth Enable/Disable,1h,1h,1h,1h,1h,hex,000h,4,1,check,2,0h/Disable,1h/Enable,
1,# Flash CH4 WE/RE Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,011h,4,4,text,1,# Flash CH4 WE/RE Pull Down Driving Strength,
1,# Flash CH4 WE/RE Pull Up Driving Strength Up,7h,7h,7h,7h,7h,hex,011h,0,4,text,1,# Flash CH4 WE/RE Pull Up Driving Strength Up,
1,# Flash CH4 CLE/AES Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,012h,4,4,text,1,# Flash CH4 CLE/AES Pull Down Driving Strength,
1,# Flash CH4 CLE/AES Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,012h,0,4,text,1,# Flash CH4 CLE/AES Pull Up Driving Strength,
1,# Flash CH4 DQ Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,013h,4,4,text,1,# Flash CH4 DQ Pull Down Driving Strength,
1,# Flash CH4 DQ Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,013h,0,4,text,1,# Flash CH4 DQ Pull Up Driving Strength,
1,# Flash CH4 DQS Dpull Downriving Strength,7h,7h,7h,7h,7h,hex,014h,4,4,text,1,# Flash CH4 DQS Dpull Downriving Strength,
1,# Flash CH4 DQS Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,014h,0,4,text,1,# Flash CH4 DQS Pull Up Driving Strength,
1,CH5 Flash Driving Sterngth Enable/Disable,1h,1h,1h,1h,1h,hex,000h,5,1,check,2,0h/Disable,1h/Enable,
1,# Flash CH5 WE/RE Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,015h,4,4,text,1,# Flash CH5 WE/RE Pull Down Driving Strength,
1,# Flash CH5 WE/RE Pull Up Driving Strength Up,7h,7h,7h,7h,7h,hex,015h,0,4,text,1,# Flash CH5 WE/RE Pull Up Driving Strength Up,
1,# Flash CH5 CLE/AES Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,016h,4,4,text,1,# Flash CH5 CLE/AES Pull Down Driving Strength,
1,# Flash CH5 CLE/AES Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,016h,0,4,text,1,# Flash CH5 CLE/AES Pull Up Driving Strength,
1,# Flash CH5 DQ Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,017h,4,4,text,1,# Flash CH5 DQ Pull Down Driving Strength,
1,# Flash CH5 DQ Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,017h,0,4,text,1,# Flash CH5 DQ Pull Up Driving Strength,
1,# Flash CH5 DQS Dpull Downriving Strength,7h,7h,7h,7h,7h,hex,018h,4,4,text,1,# Flash CH5 DQS Dpull Downriving Strength,
1,# Flash CH5 DQS Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,018h,0,4,text,1,# Flash CH5 DQS Pull Up Driving Strength,
1,CH6 Flash Driving Sterngth Enable/Disable,1h,1h,1h,1h,1h,hex,000h,6,1,check,2,0h/Disable,1h/Enable,
1,# Flash CH6 WE/RE Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,019h,4,4,text,1,# Flash CH6 WE/RE Pull Down Driving Strength,
1,# Flash CH6 WE/RE Pull Up Driving Strength Up,7h,7h,7h,7h,7h,hex,019h,0,4,text,1,# Flash CH6 WE/RE Pull Up Driving Strength Up,
1,# Flash CH6 CLE/AES Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,01Ah,4,4,text,1,# Flash CH6 CLE/AES Pull Down Driving Strength,
1,# Flash CH6 CLE/AES Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,01Ah,0,4,text,1,# Flash CH6 CLE/AES Pull Up Driving Strength,
1,# Flash CH6 DQ Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,01Bh,4,4,text,1,# Flash CH6 DQ Pull Down Driving Strength,
1,# Flash CH6 DQ Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,01Bh,0,4,text,1,# Flash CH6 DQ Pull Up Driving Strength,
1,# Flash CH6 DQS Dpull Downriving Strength,7h,7h,7h,7h,7h,hex,01Ch,4,4,text,1,# Flash CH6 DQS Dpull Downriving Strength,
1,# Flash CH6 DQS Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,01Ch,0,4,text,1,# Flash CH6 DQS Pull Up Driving Strength,
1,CH7 Flash Driving Sterngth Enable/Disable,1h,1h,1h,1h,1h,hex,000h,7,1,check,2,0h/Disable,1h/Enable,
1,# Flash CH7 WE/RE Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,01Dh,4,4,text,1,# Flash CH7 WE/RE Pull Down Driving Strength,
1,# Flash CH7 WE/RE Pull Up Driving Strength Up,7h,7h,7h,7h,7h,hex,01Dh,0,4,text,1,# Flash CH7 WE/RE Pull Up Driving Strength Up,
1,# Flash CH7 CLE/AES Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,01Eh,4,4,text,1,# Flash CH7 CLE/AES Pull Down Driving Strength,
1,# Flash CH7 CLE/AES Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,01Eh,0,4,text,1,# Flash CH7 CLE/AES Pull Up Driving Strength,
1,# Flash CH7 DQ Pull Down Driving Strength,7h,7h,7h,7h,7h,hex,01Fh,4,4,text,1,# Flash CH7 DQ Pull Down Driving Strength,
1,# Flash CH7 DQ Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,01Fh,0,4,text,1,# Flash CH7 DQ Pull Up Driving Strength,
1,# Flash CH7 DQS Dpull Downriving Strength,7h,7h,7h,7h,7h,hex,020h,4,4,text,1,# Flash CH7 DQS Dpull Downriving Strength,
1,# Flash CH7 DQS Pull Up Driving Strength,7h,7h,7h,7h,7h,hex,020h,0,4,text,1,# Flash CH7 DQS Pull Up Driving Strength,
FLASH ODT(ASIC),24,061h,
1,CH0 ODT Enable/Disable,1h,1h,1h,1h,1h,hex,000h,0,1,check,2,0h/Disable,1h/Enable,
1,# Flash Ch0 DQ ODT,1h,1h,1h,1h,1h,hex,001h,0,4,text,1,# Flash Ch0 DQ ODT[0x0h~0xFh],
1,# Flash Ch0 DQS ODT,1h,1h,1h,1h,1h,hex,001h,4,4,text,1,# Flash Ch0 DQS ODT[0x0h~0xFh],
1,CH1 ODT Enable/Disable,1h,1h,1h,1h,1h,hex,000h,1,1,check,2,0h/Disable,1h/Enable,
1,# Flash Ch1 DQ ODT,1h,1h,1h,1h,1h,hex,002h,0,4,text,1,# Flash Ch1 DQ ODT[0x0h~0xFh],
1,# Flash Ch1 DQS ODT,1h,1h,1h,1h,1h,hex,002h,4,4,text,1,# Flash Ch1 DQS ODT[0x0h~0xFh],
1,CH2 ODT Enable/Disable,1h,1h,1h,1h,1h,hex,000h,2,1,check,2,0h/Disable,1h/Enable,
1,# Flash Ch2 DQ ODT,1h,1h,1h,1h,1h,hex,003h,0,4,text,1,# Flash Ch2 DQ ODT[0x0h~0xFh],
1,# Flash Ch2 DQS ODT,1h,1h,1h,1h,1h,hex,003h,4,4,text,1,# Flash Ch2 DQS ODT[0x0h~0xFh],
1,CH3 ODT Enable/Disable,1h,1h,1h,1h,1h,hex,000h,3,1,check,2,0h/Disable,1h/Enable,
1,# Flash Ch3 DQ ODT,1h,1h,1h,1h,1h,hex,004h,0,4,text,1,# Flash Ch3 DQ ODT[0x0h~0xFh],
1,# Flash Ch3 DQS ODT,1h,1h,1h,1h,1h,hex,004h,4,4,text,1,# Flash Ch3 DQS ODT[0x0h~0xFh],
1,CH4 ODT Enable/Disable,1h,1h,1h,1h,1h,hex,000h,4,1,check,2,0h/Disable,1h/Enable,
1,# Flash Ch4 DQ ODT,1h,1h,1h,1h,1h,hex,005h,0,4,text,1,# Flash Ch4 DQ ODT[0x0h~0xFh],
1,# Flash Ch4 DQS ODT,1h,1h,1h,1h,1h,hex,005h,4,4,text,1,# Flash Ch4 DQS ODT[0x0h~0xFh],
1,CH5 ODT Enable/Disable,1h,1h,1h,1h,1h,hex,000h,5,1,check,2,0h/Disable,1h/Enable,
1,# Flash Ch5 DQ ODT,1h,1h,1h,1h,1h,hex,006h,0,4,text,1,# Flash Ch5 DQ ODT[0x0h~0xFh],
1,# Flash Ch5 DQS ODT,1h,1h,1h,1h,1h,hex,006h,4,4,text,1,# Flash Ch5 DQS ODT[0x0h~0xFh],
1,CH6 ODT Enable/Disable,1h,1h,1h,1h,1h,hex,000h,6,1,check,2,0h/Disable,1h/Enable,
1,# Flash Ch6 DQ ODT,1h,1h,1h,1h,1h,hex,007h,0,4,text,1,# Flash Ch6 DQ ODT[0x0h~0xFh],
1,# Flash Ch6 DQS ODT,1h,1h,1h,1h,1h,hex,007h,4,4,text,1,# Flash Ch6 DQS ODT[0x0h~0xFh],
1,CH7 ODT Enable/Disable,1h,1h,1h,1h,1h,hex,000h,7,1,check,2,0h/Disable,1h/Enable,
1,# Flash Ch7 DQ ODT,1h,1h,1h,1h,1h,hex,008h,0,4,text,1,# Flash Ch7 DQ ODT[0x0h~0xFh],
1,# Flash Ch7 DQS ODT,1h,1h,1h,1h,1h,hex,008h,4,4,text,1,# Flash Ch7 DQS ODT[0x0h~0xFh],
FLASH Internal Driving Strength,2,06Ch,
1,Programmable Output Drive Strength(Feature Address 10h and 80h),02h,02h,02h,02h,02h,hex,000h,0,8,drop,4,00h/Not supported,01h/25 Ohms,02h/35 Ohms(default),03h/50 Ohms,
1,ODT enabled with Rtt(Feature Address 02h),20h,20h,20h,20h,20h,hex,001h,0,8,drop,5,00h/ODT disabled(default),10h/ODT enabled with Rtt of 150 Ohms,20h/ODT enabled with Rtt of 100 Ohms,30h/ODT enabled with Rtt of 75 Ohms,40h/ODT enabled with Rtt of 50 Ohms,
FLASH Clock,1,06Ah,
1,Flash clock (Mz),3250,3250,3250,3250,3250,dec,000h,0,16,drop,48,125/12.5Mhz,250/25Mhz,375/37.5Mhz,500/50Mhz,625/62.5Mhz,750/75Mhz,875/87.5Mhz,1000/100Mhz,1125/112.5Mhz,1250/125Mhz,1375/137.5Mhz,1500/150Mhz,1625/162.5Mhz,1750/175Mhz,1875/187.5Mhz,2000/200Mhz,2125/212.5Mhz,2250/225Mhz,2375/237.5Mhz,2500/250Mhz,2625/262.5Mhz,2750/275Mhz,2875/287.5Mhz,3000/300Mhz,3125/312.5Mhz,3250/325Mhz,3375/337.5Mhz,3500/350Mhz,3625/362.5Mhz,3750/375Mhz,3875/387.5Mhz,4000/400Mhz,4125/412.5Mhz,4250/425Mhz,4375/437.5Mhz,4500/450Mhz,4625/465.5Mhz,4750/475Mhz,4875/487.5Mhz,5000/500Mhz,5125/512.5Mhz,5250/525Mhz,5375/537.5Mhz,5500/550Mhz,5625/562.5Mhz,5750/575Mhz,5875/587.5Mhz,6000/600Mhz,
NT50960S,12,0A0h,
1,Slave Address,FFh,FFh,FFh,FFh,FFh,hex,000h,0,8,text,1,(null),
1,Application Register,34h,34h,34h,34h,34h,hex,001h,0,8,text,1,(null),
1,STORAGE33,7Fh,7Fh,7Fh,7Fh,7Fh,hex,002h,0,8,text,1,(null),
1,STORAGE50,7Fh,7Fh,7Fh,7Fh,7Fh,hex,003h,0,8,text,1,(null),
1,RELEASE33,06h,06h,06h,06h,06h,hex,004h,0,8,text,1,(null),
1,RELEASE50,06h,06h,06h,06h,06h,hex,005h,0,8,text,1,(null),
1,ISO MOS Register,64h,64h,64h,64h,64h,hex,006h,0,8,text,1,(null),
1,BST MOS and ISO MOS register,16h,16h,16h,16h,16h,hex,007h,0,8,text,1,(null),
1,Regulator Register,Dh,Dh,Dh,Dh,Dh,hex,008h,0,8,text,1,(null),
1,Capacitor Detect,8h,8h,8h,8h,8h,hex,009h,0,8,text,1,(null),
1,Detect Time,2Ch,2Ch,2Ch,2Ch,2Ch,hex,00Ah,0,8,text,1,(null),
1,Program MTP,0h,0h,0h,0h,0h,hex,00Bh,0,8,text,1,(null),
Others,24,06Eh,
1,RestoreInfo flow for MPISP,1h,1h,1h,1h,1h,hex,000h,0,1,check,2,0h/Enable,1h/Disable,
1,TSB ECC (2262 only),1h,1h,1h,1h,1h,hex,001h,0,1,check,2,0h/Disable,1h/Enable,
1,CPU ECC (2262 only),1h,1h,1h,1h,1h,hex,001h,1,1,check,2,0h/Disable,1h/Enable,
1,EnableE2E,1h,1h,1h,1h,1h,hex,001h,4,1,check,2,0h/Disable,1h/Enable,
1,OneFourthPageAlign,1h,1h,1h,1h,1h,hex,001h,5,1,check,2,0h/Disable,1h/Enable,
1,GRTPECycle_TLC,1500,1500,1500,1500,1500,dec,004h,0,16,text,1,(null),
1,GRTPECycle_SLC,30000,30000,30000,30000,30000,dec,006h,0,16,text,1,(null),
1,UnitPerRAID,1h,1h,2h,1h,2h,hex,008h,0,8,drop,3,1h/4K RAID(HH),2h/8K RAID(HH),4h/16K RAID(PS),
1,Dram ECC,1h,1h,1h,1h,1h,hex,009h,0,1,check,2,0h/Disable,1h/Enable,
1,Dram ECC Table Protected,1h,1h,1h,1h,1h,hex,009h,3,1,check,2,0h/Disable,1h/Enable,
1,Dram ECC DataCache Protected,1h,1h,1h,1h,1h,hex,009h,1,1,check,2,0h/Disable,1h/Enable,
1,Dram ECC CacheCRC Protected,0h,0h,0h,0h,0h,hex,009h,2,1,check,2,0h/Disable,1h/Enable,
1,Dram ECC H2F Protected,0h,0h,0h,0h,0h,hex,009h,4,1,check,2,0h/Disable,1h/Enable,
1,Manual Block Num,548,548,548,548,548,dec,00Eh,0,16,text,1,(null),
1,Enable NAND sorting,0h,0h,0h,0h,0h,hex,010h,0,1,check,2,0h/Disable,1h/Enable,
1,Ignore flash ID compare,1h,1h,1h,1h,1h,hex,010h,1,1,check,2,0h/Disable,1h/Enable,
1,Erase ALL (avoid use old info block),0h,0h,0h,0h,0h,hex,010h,2,1,check,2,0h/Disable,1h/Enable,
1,TranAdj_AllSeed,0h,0h,0h,0h,0h,hex,010h,3,1,check,2,0h/Disable,1h/Enable,
1,Enable system block screen,0h,0h,0h,0h,0h,hex,010h,4,1,check,2,0h/Disable,1h/Enable,
1,FTR_Trigger,0h,0h,0h,0h,0h,hex,010h,5,1,check,2,0h/Disable,1h/Enable,
1,Enable L2 Cache,1h,1h,1h,1h,1h,hex,011h,0,1,check,2,0h/Disable,1h/Enable,
1,LS Type Name,0h,4h,5h,4h,5h,hex,012h,0,8,check,6,0h/Default,1h/250G,2h/500G,3h/1000G,4h/B16B17,5h/B27A,
1,ForcePlaneNum (0:Disable),0,0,0,0,0,dec,013h,0,8,text,0,
1,Enable Force Erase,1h,1h,1h,1h,1h,hex,014h,0,1,check,2,0h/Disable,1h/Enable,
CRC,B1E4h,8743h,E812h,9F6Fh,9C17h,7441h,
